SNN-MLIR¶
An out-of-tree MLIR dialect for Spiking Neural Networks (SNNs), compatible with the NIR (Neuromorphic Intermediate Representation) standard.
The dialect provides type-polymorphic operations that work with both f32 (float) and
quantized (i8/i32) types, enabling a single IR to target both simulation and
hardware-optimized deployments. A reference CPU lowering (SNNToLinalg) converts SNN ops to
standard linalg/arith operations that any MLIR-based backend can consume.
A companion Python package (snn-mlir, available on PyPI)
reads any NIR file and emits SNN dialect MLIR text, ready to feed into the snn-opt lowering
toolchain. (The C runtime files used in the examples are generated separately by
examples/_codegen.py, which is not part of the installable package.)

Supported simulators¶
NIR is supported as an export target by a growing list of SNN frameworks. Any of them can in
principle feed snn-mlir; the table below shows which we have tested end-to-end through the
MLIR pipeline and which ship as a runnable example.
| Framework | Exports to NIR | Tested through MLIR | Example |
|---|---|---|---|
| LAVA / lava-dl | ✅ | ✅ | SNN Oxford |
| snnTorch | ✅ | ✅ | SNNTorch |
| hxtorch (BrainScaleS-2) | ✅ | — | — |
| Nengo | ✅ | — | — |
| Norse | ✅ | — | — |
| Rockpool | ✅ | — | — |
| Sinabs | ✅ | — | — |
Does your simulator export to NIR but isn't tested here?
We'd love to extend coverage. If your framework writes a NIR graph that snn-mlir doesn't
yet handle, you are very welcome to send us the NIR graph and we'll test it and add
support. See Contributing.
Which path is for you?¶
snn-mlir sits at the boundary between the neuromorphic and compiler worlds, so there are two natural entry points:
- Coming from SNNs / neuromorphics? You'll most likely care about the Python package and the translation from NIR to MLIR — exporting your trained network and getting a portable, embedded-ready representation out.
- Coming from compilers / embedded systems? You'll most likely care about the SNN MLIR dialect and lowering it to your hardware — bringing your own backend (CPU, FPGA, ASIC) under a shared IR.
Questions, doubts, or bugs?¶
We're happy to help. Reach out to the maintainers any time:
- Alex G. Gener — alejandro.garcia@intera-group.com
- Alvaro Rollon — alvaro.rollon@intera-group.com
Citation¶
A companion paper describing snn-mlir is published on arXiv. If you use snn-mlir in your research, please cite the white paper directly:
@misc{gener2026snnmlirmlirdialectcompiling,
title={SNN-MLIR: An MLIR Dialect for Compiling Neuromorphic SNNs from NIR to Bare-Metal C},
author={Alejandro García Gener and Alvaro Rollón de Pinedo},
year={2026},
eprint={2606.09213},
archivePrefix={arXiv},
primaryClass={cs.PL},
url={https://arxiv.org/abs/2606.09213},
}
License¶
Apache License 2.0 WITH LLVM-exception — see the LICENSE file in the repository.